SoC Architecture Engineer — High-Speed Automotive SerDes SoCs (5–10 Yrs)

Job description

About Texas Instruments Texas Instruments (TI) is a global semiconductor company designing, manufacturing, and selling analog and embedded processing chips — powering everything from industrial automation to automotive safety systems worldwide. About the Team — High Speed Data Interface Product Group The High Speed Data Interface product group focuses on the development of differentiated high-speed SerDes SoCs targeted for automotive and industrial markets. There are two primary focus areas — Ethernet PHY and FPD-Link. Ethernet PHY Group: A large number of applications — like in-vehicle driver alertness monitors, steering, or accelerator control in automotive and robotic applications — require an Ethernet interface. The ubiquity of Ethernet-enabled devices allows customers to simplify connecting large numbers of devices in automotive and robotic environments. Customers expect robust performance in the presence of interference and ESD events, along with processing offload capabilities. The low-cost migration from CAN to Ethernet presents unique challenges requiring interdisciplinary skills with aggressive cost and power targets. FPD-Link Group: The proprietary FPD-Link interface addresses multi-gigabit (up to 20 Gbps) automotive and industrial sensor and display markets. Constant increase in density of electronic sensing and display content is pushing data rate (>20 Gbps) and BER performance requirements higher. Automotive functional safety requirements demand robust performance at these high data rates under challenging environments while maintaining low power consumption. The Broader Mission: As part of this product group, you will be engaged in designing solutions spanning Analog, Digital, and Signal Processing domains to mitigate impairments such as high channel loss, ESD strikes, and narrowband interference. The team implements high-performance equalization circuits (CTLE, FFE, DFE), high-speed converters (DAC, ADC), high-speed digital front-ends, signal processing algorithms, embedded microcontrollers, and high-speed interfaces for camera and display systems. The team has successfully achieved several differentiated innovations through collaborative cross-domain optimization. The entire product lifecycle — from product specification to customer and application support — is owned by the product group in Bangalore, giving each team member tremendous learning opportunity and enhanced scope to influence the global success of the product. We are looking for passionate, creative, and self-driven engineers who challenge traditional techniques and come up with innovative solutions to make a difference. Role Overview As a SoC Architecture Engineer, you will be the intellectual anchor of the product group. You will conceive, define, and validate the end-to-end architecture of next-generation high-speed automotive SerDes SoCs — making critical decisions on system partitioning, block-level microarchitecture, power/performance/area trade-offs, and cross-domain integration across analog, digital, signal processing, and firmware subsystems. Your architectural decisions will directly determine the competitive differentiation and market success of TI's Ethernet PHY and FPD-Link products. Key Responsibilities Define and own full-chip SoC architecture for next-generation Ethernet PHY and FPD-Link SerDes SoCs — from top-level system partitioning to block-level microarchitectureEstablish system-level performance budgets — BER, power, latency, jitter, ESD immunity — and allocate them across analog, digital, DSP, and firmware subsystemsDrive architecture trade-off analyses across competing design approaches in analog, digital, and mixed-signal domains to arrive at optimal SoC solutionsDevelop and maintain SoC architecture documents, interface specifications, and design guidelines as authoritative references for the engineering teamLead cross-domain integration decisions — defining interfaces between analog front-ends, digital back-ends, embedded microcontrollers, and high-speed I/OIdentify and champion architectural innovations for next-generation products through competitive benchmarking, technology surveys, and first-principles analysisCollaborate with product marketing and systems teams to translate market requirements and customer pain points into precise SoC architectural decisionsGuide and mentor design engineers across domains, ensuring architectural intent is faithfully realized in RTL, circuits, firmware, and physical implementationContribute to IP generation, patent filings, and external publications representing TI's architectural innovations ✅ Required Qualifications Education: B.Tech / M.Tech / Ph.D. in Electronics / VLSI / Communications / Electrical EngineeringExperience: 5–10 years of SoC architecture or senior design experience across multiple domainsDemonstrated ability to architect complex mixed-signal SoCs spanning analog, digital, and firmware domainsDeep understanding of high-speed SerDes system architecture — PHY layer, link protocol, equalization, clock/data recoveryStrong proficiency in system-level modeling and performance simulation (MATLAB, Python, SystemC)Broad knowledge across analog circuit design, digital RTL, DSP algorithms, and embedded softwareProven track record of driving silicon from architecture to tapeout on production-grade SoCsExcellent technical communication — ability to present complex trade-offs to diverse audiences Preferred / Good-to-Have Skills Deep expertise in Ethernet PHY (100BASE-T1, 1000BASE-T1, 10GBASE-T1) or FPD-Link / MIPI protocol architectureKnowledge of automotive functional safety architecture (ISO 26262, ASIL decomposition at SoC level)Experience with power architecture — multi-voltage domain planning, dynamic voltage-frequency scalingBackground in technology node selection and process-architecture co-optimizationTrack record of patent generation in SerDes, mixed-signal, or SoC architecture domains What Makes This Role Unique